Mar 2010 - May 2014
Managed group that did emulation and development platforms for second largest supplier of RISC CPU's in the world. Architected and designed FPGA based hardware development and emulation platforms for SOC's that ran Android, Linux or embedded OS. Deployment and management of, Synopsis Synplify, Cadence Allegro, Orcad CIS, Arena, Jira, Confluence, Electric Cloud, Perforce, MySQL and automated test data collection. Deployment and management of collaboration tools to link international development teams.
Oct 2008 - Dec 2009
Managing a design team of optics, thermal, electrical, power, and mechanical engineers located in both San Jose and Malaysia for stealth mode green technology start up. Lead the development of 5 highly innovative new product with UL & FCC approval and all put into mass production, Managed design and tooling release of precision optical injection molded parts, aluminum extrusions and high-volume progressive dies. Put into place engineering infrastructure, mechanical and thermal modeling tools and other internal development and prototyping tools, filed 7 patent. Operations were moved to Malaysia at end of 2009 due to lack of VC funding in USA.
Director, Silicon Valley Design Center
Nov 2007 - Oct 2008
Lead the design of new HD video cameras based on Zoran processors. Lead design of new development platforms, high density cameras and Lithium-Ion based power management systems. Managed group responsible for firmware engineering, electrical engineering, optical engineering, and mechanical engineering for company that produces digital video camcorders under the "Flip Video" brand name. Quadrupled the size of the engineering group, brought in modern engineering tools and development processes. Moved the engineering group from a tiny poorly setup remote office into a state-of-the-art design center. Traveled extensively to China and Taiwan for production bring-up.
Sr Director Platform Engineering at Transmeta
Mar 2003 - Apr 2007
Managing group responsible for product architecture, reference design, validation board design, power supply design, test automation, documentation, and signal integrity for ultra-low power x86 compatible computing platforms. Lead development of a custom ultra-secure flash memory device using new and novel package technologies. Lead the development of the lowest power 1.7GHz media center PC in the world. Developed automated infrastructure for CPU testing and characterization for dynamic voltage and frequency scaling (DVFS) built on TestStand, Labview and MySQL which permitted the characterization of thousands of devices to be used to generate operational DVFS manifolds. Traveled throughout Asia to work with suppliers and customers. Lead team on development of power delivery and packaging design optimization for Sony Cell processor. Moved the department into a world class engineering group.
Director of Systems Engineering
2002 - 2003
Managed engineering group responsible for system architecture, reference designs and silicon validation for System on Chip startup. Portalplayer produced ASIC's for the MP3 audio market that features dual Arm 7 processors with integrated IDE, USB, AC97, I2S, SDRAM interface and flash memory controllers. Worked directly with early Apple team on the first generation of the iPod. Created reference designs that lead to several successful MP3 player products. Brought in new tools and methodologies that greatly improved the audio performance of Portalplayer's products. Created roadmap for new features, functions, and platforms for advanced MP3 players. Walked into a highly disorganized situation and turned it into a highly productive and highly focused group. Managed group through transition of engineering staff to India.
Hardware Engineering Manager
1999 - 2002
Managed engineering group that created Internet terminals and set top box products that have sold more than 1,000,000 units. Developed Philips brand WebTV consumer internet terminal products, Tivo digital video recorder and DirectTV satellite products. Traveled around the world to factories and key suppliers to coordinate NPI and production activities. Created development plans, architecture plans, department budgets and engineering processes. Managed agency compliance and homologation activities for worldwide sales. Implemented new design tools and development systems including the use of Mentor Design tools and Agile PDM. Participated in architecture development for custom ASICs that performed multiple MPEG 2 stream decode and MIPS R5000 core for OS support. Held group together through six management re-organizations, recruited key personnel, kept moral high and department focused throughout company changes.
Pepperdine University, Master of Science (M.S.), Technology Management
Northeastern University, Bachelor of Science (BS), Electrical and Electronics Engineering
System-On-Chip, System-On-Package, Chiplet, SOC Architecture, Network-On-Chip, DVFS, System Architecture, MIPS, ARM, RISC-V, Embedded Systems, Hardware, Architecture, Power Management, IC, SoC, Analog, ASIC, Consumer Electronics, FPGA, CMOS, NPI.